Weight-four parity checks in a spin-shuttling architecture

TL;DR - A silicon spin-qubit device uses a shuttling bus to transport qubits and perform parity checks up to weight four. This supports shuttling as a practical technique for semiconductor quantum processors.

• Demonstrates parity checks involving as many as four qubits.
• Uses a shuttling bus to move spin qubits within the device.
• Highlights potential architectural benefits of qubit transport in silicon processors.