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HiKV: Hierarchical Importance-Aware KV Cache with Hardware Acceleration for LLM Decoding

Research Efficiency & Systems

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TL;DR - HiKV is an algorithm-hardware co-design that compresses LLM KV caches using hierarchical importance filtering. It accelerates attention by up to 7.95× and reduces energy by 90% with negligible accuracy loss.

  • First evicts unimportant tokens, then loads only significant elements from retained tokens.
  • Uses a reconfigurable importance sorter to support both compression stages in one accelerator.
  • Reduces external memory accesses by an additional 1.82–4.87× versus importance-based alternatives at equal accuracy.
  • Adds 8% system area while keeping accuracy loss within 1%.

Sources (1)

HiKV: Hierarchical Importance-Aware KV Cache with Hardware Acceleration for LLM Decoding

arXiv cs.AR Chao Fang, Jun Yin, Man Shi, Marian Verhelst 2026-07-24 arXiv:2607.22389
Public signals Semantic Scholar citations 0 · Semantic Scholar influential citations 0
Providers: Hugging Face · N/A OpenAlex · N/A Publisher · N/A Semantic Scholar · Citations 0 · Influential citations 0 X · N/A Fetched 2026-08-26 14:45:52.819479 UTC

TL;DR - HiKV is an algorithm-hardware co-design that compresses LLM KV caches using hierarchical importance filtering. It accelerates attention by up to 7.95× and reduces energy by 90% with negligible accuracy loss.

  • First evicts unimportant tokens, then loads only significant elements from retained tokens.
  • Uses a reconfigurable importance sorter to support both compression stages in one accelerator.
  • Reduces external memory accesses by an additional 1.82–4.87× versus importance-based alternatives at equal accuracy.
  • Adds 8% system area while keeping accuracy loss within 1%.
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