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SPECTRA: Adaptive Execution of Speculative Decoding on a Runtime-Reconfigurable Tiled Architecture

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Merged summary

TL;DR - SPECTRA is a runtime-reconfigurable tiled architecture for efficient speculative decoding on resource-constrained edge devices. Its per-kernel adaptation maintains high utilization across memory-bound decoding, compute-bound prefill, and variable-intensity verification workloads.

  • Each tile switches between systolic GEMM execution and vector-lane GEMV execution.
  • System-level reconfiguration dynamically adjusts tile count, kernel partitioning, and communication patterns.
  • A 20-tile FPGA prototype was evaluated on Pythia, SmolLM2, and GPT-2 model families.
  • Tile-level reconfiguration delivered up to a 2.09Ă— speedup, with system-level adaptability adding a further 1.25Ă— gain over fixed designs.

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SPECTRA: Adaptive Execution of Speculative Decoding on a Runtime-Reconfigurable Tiled Architecture

arXiv cs.AR Gabriele Tombesi, William Baisi, Je Yang, Elisavet Lydia Alvanaki, Kevin Lee, Michael Lippe, Biruk Seyoum, Luca P. Carloni 2026-09-21 arXiv:2609.24847
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Providers: Hugging Face · N/A OpenAlex · N/A Publisher · N/A Semantic Scholar · N/A X · N/A Fetched 2026-09-26 14:14:40.969313 UTC

TL;DR - SPECTRA is a runtime-reconfigurable tiled architecture for efficient speculative decoding on resource-constrained edge devices. Its per-kernel adaptation maintains high utilization across memory-bound decoding, compute-bound prefill, and variable-intensity verification workloads.

  • Each tile switches between systolic GEMM execution and vector-lane GEMV execution.
  • System-level reconfiguration dynamically adjusts tile count, kernel partitioning, and communication patterns.
  • A 20-tile FPGA prototype was evaluated on Pythia, SmolLM2, and GPT-2 model families.
  • Tile-level reconfiguration delivered up to a 2.09Ă— speedup, with system-level adaptability adding a further 1.25Ă— gain over fixed designs.
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