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芯片从业者拆解OpenAI造芯,还能再快3个月?

Industry & News AI Chip Design

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Merged summary

TL;DR - OpenAI reportedly used AI-assisted workflows and Broadcom’s engineering capabilities to move its first custom inference ASIC, Jalapeño, from initial design to tape-out in nine months. AI can sharply accelerate bounded tasks such as RTL implementation and verification, but architecture decisions, manufacturing, deployment, and adaptation to rapidly changing models keep the full chip lifecycle measured in years.

  • AI participated in implementation exploration, design-measure-verify loops, arithmetic-circuit optimization, and post-silicon debugging and programming.
  • One engineer reported reducing a unit-verification workflow from two engineers over four months to one engineer over roughly three weeks; Nvidia and Altera also reported major RTL-verification gains from AI agents.
  • Broadcom’s silicon implementation, interconnect, interface IP, and mature engineering processes were essential to the schedule, so the nine-month result cannot be attributed to AI alone.
  • OpenAI chose to support both prefill and decode on one chip, preserving software flexibility as MoE, attention, communication, memory, and bandwidth requirements evolve faster than hardware.

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芯片从业者拆解OpenAI造芯,还能再快3个月?

雷峰网 (AI科技评论) 2026-09-16
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Providers: Hugging Face · N/A OpenAlex · N/A Publisher · N/A Semantic Scholar · N/A X · N/A Fetched 2026-09-26 14:15:44.093137 UTC

TL;DR - OpenAI reportedly used AI-assisted workflows and Broadcom’s engineering capabilities to move its first custom inference ASIC, Jalapeño, from initial design to tape-out in nine months. AI can sharply accelerate bounded tasks such as RTL implementation and verification, but architecture decisions, manufacturing, deployment, and adaptation to rapidly changing models keep the full chip lifecycle measured in years.

  • AI participated in implementation exploration, design-measure-verify loops, arithmetic-circuit optimization, and post-silicon debugging and programming.
  • One engineer reported reducing a unit-verification workflow from two engineers over four months to one engineer over roughly three weeks; Nvidia and Altera also reported major RTL-verification gains from AI agents.
  • Broadcom’s silicon implementation, interconnect, interface IP, and mature engineering processes were essential to the schedule, so the nine-month result cannot be attributed to AI alone.
  • OpenAI chose to support both prefill and decode on one chip, preserving software flexibility as MoE, attention, communication, memory, and bandwidth requirements evolve faster than hardware.
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